Semiconductor devices are used in a variety of electronic applications, such as personal computers and cellular phones, for example. One such semiconductor product widely used in electronic systems for storing data is a semiconductor memory device, and one common type of semiconductor memory device is a dynamic random access memory (DRAM). DRAM is volatile memory because it loses charge or “data” in the absence of electrical power.
Another type of semiconductor memory device is a read-only memory (ROM), which is non-volatile because it retains charge or “data” in the absence of electrical power. ROM typically has a similar structure to a DRAM but has no storage capacitor and does not need to be refreshed continuously, as in a DRAM. Common applications for ROM are very broad for its smallest cell size and no extra process cost. However, ROM is one-time programmable (set during processing steps), and does not offer re-programmability. End-users see a ROM device as read-only memory.
A more recent development in ROM is a flash memory device. The term “flash” is derived from the “lightning strike” for fast erase or high voltage that may be used to in-system bulk erase the entire chip or a sector. Flash memories are used often in System-on-Chip (SoC) such as cellular phones and security cards for example, and in mass-storage applications such as in digital cameras and MP3, for example. Flash memories offer the compromise of in-system reprogrammability and somewhat higher process cost or larger cell size, compared to traditional ROM.
A semiconductor memory device typically includes millions or billions of individual memory cells, with each cell storing one bit of data. A memory cell may include an access field effect transistor (FET), often called 2T cell, or use memory cell's own transistor, often called 1T cell, which is used to control the transfer of data charges to and from the storage floating gate (FG) during reading and writing operations. Memory devices are typically arranged in an array of memory cells. The storing and accessing of information into and from memory cells is achieved by selecting and applying voltages to the access FET or directly to the memory cell using selected wordlines and bitlines. Typical flash memories operate with relatively high voltages, e.g. greater than 10 V.
In fabricating semiconductor devices such as SoC, shallow trench isolation (STI) is a technique used to provide electrical isolation between various devices such as logic devices, mixed-signal, analog, as well as adjacent cells in a memory array configuration. In some semiconductor device such as in SoC designs, it is more advantageous to integrate a dual-isolation scheme since some devices need more electrical isolation from adjacent devices than others. When the memory cells comprise high voltage devices such as flash memory cells, for example, the high voltage devices as well as flash memories require deeper isolation regions within the substrate in order to electrically isolate them from adjacent devices, compared to logic devices that require STI for their low voltage operation. It is more difficult to pattern deep isolation regions for higher aspect ratio features (trench depth over its width); therefore it is not feasible to use deep trenches to isolate all active areas of a semiconductor device. Thus, some semiconductor device designs such as flash memories, for example, are required to utilize both deep and shallow isolation regions.
FIG. 1 illustrates a prior art semiconductor device 100 having deep trenches 116/118/124 for isolation proximate high voltage active areas 108 and shallow trenches 124 for isolation proximate logic (e.g., lower voltage) active areas 112. The semiconductor device 100 shown includes a workpiece 102 having a first region 107 comprising first active areas 108 and a second region 110 having second active areas 112. The first active areas 108 may comprise high voltage transistors or flash memory cells, for example, and thus they require deeper isolation structures 116/118/124 than second active areas 112 which may comprise low voltage devices, for example. The high voltage transistors in the first active areas 108 may require a voltage of 10 to 20 volts or even higher, whereas the low voltage devices in the second active areas 112 may require a voltage of 1 to 2 volts, for example. Thus, such a semiconductor device 100 would require shallow trench isolation 124 between adjacent first active areas 108 and/or second active areas 112, as shown. The high voltage first active areas 108 would also require deep trenches 116/118/124 to prevent electrically affecting the adjacent second active areas 112 and adjacent first active areas 108, if applicable.
FIG. 2 shows a first active area 108 comprising a high voltage component having a control gate CG and a floating gate FG. A flash memory device may have a structure shown in first active area 108, for example. The floating gate FG is separated from the substrate 102 or workpiece by a first insulating layer 126. A second insulating layer 128 is disposed between the floating gate FG and the control gate CG. In operation, the control gate CG, source S and drain D are exposed to a high voltage potential in order to charge and discharge the floating gate FG.